A known conventional reference voltage generating circuit uses, as the constant current source, a depletion-mode metal-oxide semiconductor field-effect transistor (MOSFET) in which the gate and the source are connected (see, for example, patent document 1). In such a reference voltage generating circuit, as shown in FIG. 11A, the gate and the source of a depletion-mode MOSFET Q21 are connected so that it functions as a constant current source. An enhancement-mode MOSFET Q22, in which the gate and the drain are connected, is connected in series with the depletion-mode MOSFET Q21 so that it operates with a constant current supplied from the depletion-mode MOSFET Q21, and a voltage appearing at the enhancement-mode MOSFET Q22 is output as a reference voltage Vref. The depletion-mode MOSFET Q21 and the enhancement-mode MOSFET Q22 are both N-channel MOSFETS. The reference voltage Vref equals the difference between a threshold voltage Vt_d of the depletion-mode MOSFET Q21 and a threshold voltage Vt_e of the enhancement-mode MOSFET Q22.
FIG. 11B is a graph showing the relationship between Vgs and (Ids)1/2 of the depletion-mode MOSFET Q21 and the enhancement-mode MOSFET Q22 (Vgs indicates a voltage between the gate and the source, and Ids indicates a drain current). In FIG. 11B, it is assumed that the drain voltage is in the saturation region and the conductance factors (K) of the depletion-mode MOSFET Q21 and the enhancement-mode MOSFET Q22 are the same.
Since Vgs of the depletion-mode MOSFET Q21 is fixed at 0 V, the depletion-mode MOSFET Q21 conducts a constant current Iconst. Therefore, Vref is a Vgs of the enhancement-mode MOSFET Q22 at which Ids equals Iconst (Ids=Iconst) and can be obtained by the formula Vref=Vt_e−Vt_d.
Thus, Vref is obtained as the difference between the threshold voltage Vt_e of the enhancement-mode MOSFET Q22 and the threshold voltage Vt_d of the depletion-mode MOSFET Q21. Since the threshold-voltage Vt_d of the depletion-mode MOSFET Q21 is a negative value, the above formula can also be expressed as Vref=|Vt_l|+|Vt_d|.
FIG. 12A shows another exemplary reference voltage generating circuit. The exemplary reference voltage generating circuit is a 3-transistor reference voltage generating circuit including a depletion-mode MOSFET Q23 and two enhancement-mode MOSFETs Q24 and Q25 having different threshold voltages. The depletion-mode MOSFET Q23 is a constant current source where the gate and the source are connected as in the case of the depletion-mode MOSFET Q21 shown in FIG. 11A. A threshold voltage Vt_el of the enhancement-mode MOSFET Q24 is lower than a threshold voltage Vt_eh of the enhancement-mode MOSFET Q25. The difference between the threshold voltage Vt_el and the threshold voltage Vt_eh is output as the reference voltage Vref.
FIG. 12B is a graph showing the relationship between Vgs and (Ids)1/2 of the depletion-mode MOSFET Q23 and the enhancement-mode MOSFETs Q24 and Q25. In FIG. 12B, it is assumed that the drain voltage is in the saturation region and the conductance factors (K) of the depletion-mode MOSFET Q23 and the enhancement-mode MOSFETs Q24 and Q25 are the same. Since Vgs of the depletion-mode MOSFET Q23 is fixed at 0 V, the depletion-mode MOSFET Q23 conducts a constant current Iconst as shown in FIG. 12B. Vo24 is a Vgs of the enhancement-mode MOSFET Q24 when Ids=Iconst and Vo25 is a Vgs of the enhancement-mode MOSFET Q25 when Ids=Iconst. Vref is the difference between Vo25 and Vo24: Vref=Vo25−Vo24. In other words, Vref can be expressed by the formula Vref=Vt_eh−Vt_el.
As another example, there is a reference voltage generating circuit including MOSFETs each having a floating gate and a control gate (see, for example, patent document 2). In a reference voltage generating circuit disclosed in patent document 2, two N-channel MOSFETs are connected in series. One of the two N-channel MOSFETs is configured as a depletion-mode MOSFET by injecting holes into the floating gate. The other one of the two N-channel MOSFETs is configured as an enhancement-mode MOSFET by injecting electrons into the floating gate. Thus, the two N-channel MOSFETs are configured to have different threshold voltages.
Also, there is an operational-amplifier type reference voltage generating circuit including MOSFETs one of which has a floating gate and a control gate (see, for example, patent document 3). A reference voltage generating circuit disclosed in patent document 3 is implemented as an operational amplifier including a differential input stage made up of a pair of MOSFETs in which operational amplifier an output terminal is connected to a negative input terminal. One of the pair of MOSFETs includes a floating gate and a control gate. The threshold voltages of the pair of MOSFETs are made different by injecting electric charges into the floating gate of one of the pair of MOSFETs. Thus, the disclosed reference voltage generating circuit is configured to output the difference between the threshold voltages of the pair of MOSFETs as an offset voltage.
[Patent document 1] Japanese Patent Publication No. 4-65546
[Patent document 2] Japanese Patent Application Publication No. 2002-368107
[Patent document 3] Japanese Patent Application Publication No. 5-119859
A disadvantage of a conventional reference voltage generating circuit including MOSFETs, each or one of which includes a floating gate and a control gate, is that the threshold voltages of the MOSFETs change over time in accordance with the decrease (discharge) or increase of electric charges in the floating gate. This, in turn, causes the output voltage from the conventional reference voltage generating circuit to change.
Also, with a conventional method where the threshold voltages of MOSFETs are determined by the channel doping levels, the impurity profiles of channels (hereafter called channel profiles) of the MOSFETs become different. As a result, temperature characteristics of the threshold voltages and mobility of the MOSFETs also become slightly different. Therefore, such a conventional method has limitations in terms of improving the temperature characteristics of a reference voltage to be output.